Because results with NOPs were inconclusive, I tried testing with combinations of various instructions designed to dodge other resource limits. Mixing instructions that write to the integer and floating point registers showed X925 could have a maximum of 448 renamed registers allocated across its register files. Recognized zeroing idioms like MOV r,0 do not allocate an integer register, but also run up against the 448 instruction limit. I tried mixing in predicate register writes, but those also share the 448 instruction limit. Adding in stores showed the core could have slightly more than 525 instructions in flight. Adding in not-taken branches did not increase reordering capacity further. Putting an exact number on X925’s reorder buffer capacity is therefore difficult, but it’s safe to say there’s a practical limitation of around 525 instructions in flight. That puts it in the same neighborhood as Intel’s Lion Cove (576) and ahead of AMD’s Zen 5 (448).
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Hamblin agrees social media has "probably accelerated trend cycles a bit too fast" which he says "doesn't help with overconsumption and people understanding their true taste".
The new tool allows a creator to tease paywalled content, rather than keeping all of the material behind a subscribers-only gate. A gif shared both by the X Creators account and by the company's head of product, Nikita Bier, show how it will look in practice. Buttons to sign up as a subscriber will be embedded into the post chain, with the hope that the need to see the rest of the thread will be a big enough draw for readers to pay up. X has been making a push to draw content creators, offering other recent features like a 'paid partnership' label for sponsored posts.